Electrically erasable programmable read only memory (EEPROM) structures are commonly used in integrated circuits for non-volatile data storage. As semiconductor devices continue to evolve, the operating voltages of such semiconductor devices are often reduced in order to suit low power applications. It is desirable for such operating voltage reductions to be accomplished while ensuring that the speed and functionality of the devices is maintained or improved. One EEPROM device, which operates at lower operating voltages than a continuous floating gate device, uses a silicon-oxide-nitride-oxide-silicon (SONOS) structure, in which charge is stored in the nitride layer. In the SONOS structure charges can be stored on either end or both ends of the SONOS structure. This allows for the SONOS structure to store 4 states (00, 01, 10, and 11). Thus, two bits can be stored.
The SONOS structure uses a nitride layer with a high trap density to store charge. This high trap density causes electrons to hop from one state to another according to the Frenkel-Poole mechanism. As the channel region of SONOS structures decreases, the two states can not be differentiated from each other due to the Frenkel-Poole mechanism. This decreases the capability of multibit storage. Therefore, a need exists to enable multibit storage in SONOS structure as channel lengths decrease.
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